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? semiconductor components industries, llc, 2002 july, 2002 rev. 7 1 publication order number: mc74ac377/d mc74ac377, mc74act377 octal d flip-flop with clock enable the mc74ac377/74act377 has eight edge-triggered, d-type flip-flops with individual d inputs and q outputs. the common buffered clock (cp) input loads all flip-flops simultaneously, when the clock enable (ce ) is low. the register is fully edge-triggered. the state of each d input, one setup time before the low-to-high clock transition, is transferred to the corresponding flip-flop's q output. the ce input must be stable only one setup time prior to the low-to-high clock transition for predictable operation. ? ideal for addressable register applications ? clock enable for address and data synchronization applications ? eight edge-triggered d flip-flops ? buffered common clock ? outputs source/sink 24 ma ? see mc74ac273 for master reset version ? see mc74ac373 for transparent latch version ? see mc74ac374 for 3-state version ? act377 has ttl compatible inputs ? msl = 1 for all surface mount ? chip complexity: 292 fets or 73 gates 1 20 pdip20 n suffix case 738 1 20 1 20 1 20 so20 dw suffix case 751 tssop20 dt suffix case 948e eiaj20 m suffix case 967 see general marking information in the device marking section on page 8 of this data sheet. device marking information see detailed ordering and shipping information in the package dimensions section on page 7 of this data sheet. ordering information http://onsemi.com
mc74ac377, mc74act377 http://onsemi.com 2 19 20 18 17 16 15 14 2 1 34567 v cc 13 8 12 9 11 10 o 7 d 7 d 6 o 6 o 5 d 5 d 4 o 4 cp ce o 0 d 0 d 1 o 1 o 2 d 2 d 3 o 3 gnd figure 1. pinout: 20lead packages conductors (top view) figure 2. logic symbol o 0 o 1 o 2 o 3 o 4 o 5 o 6 o 7 d 0 d 1 d 2 d 3 d 4 d 5 d 6 d 7 cp ce pin names pin function d 0 d 7 data inputs ce clock enable (active low) q 0 q 7 data outputs cp clock pulse input mode select-function table operating mode inputs outputs operating mode cp ce d n q n load 1 l h h load 0 l l l hold (do nothing) h x no change h o ld (d o n ot hi ng ) x h x no change h = high voltage level l = low voltage level x = immaterial = low-to-high clock transition please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. figure 3. logic diagram dq cp dq cp dq cp dq cp dq cp dq cp dq cp dq cp d 0 d 1 d 2 d 3 d 4 d 5 d 6 d 7 o 0 o 1 o 2 o 3 o 4 o 5 o 6 o 7 ce cp
mc74ac377, mc74act377 http://onsemi.com 3 maximum ratings* symbol parameter value unit v cc dc supply voltage (referenced to gnd) 0.5 to +7.0 v v in dc input voltage (referenced to gnd) 0.5 to v cc +0.5 v v out dc output voltage (referenced to gnd) 0.5 to v cc +0.5 v i in dc input current, per pin 20 ma i out dc output sink/source current, per pin 50 ma i cc dc v cc or gnd current per output pin 50 ma t stg storage temperature 65 to +150 c ja thermal resistance (junction to ambient) soic, dw tssop, dt pdip, n 97 129 69 c/w v esd esd withstand voltage human body model (note 1) machine model (note 2) charged device model (note 3) > 2000 > 200 > 1000 v i latchup latchup performance v cc = 5.5 v; ta = 125 c (note 4) > 100 ma * maximum ratings are those values beyond which damage to the device may occur. functional operation should be restricted to the recommended operating conditions. 1. tested to eia/jesd22a114a 2. tested to eia/jesd22a115a 3. tested to jesd22c101a 4. tested to eia/jesd78 recommended operating conditions symbol parameter min typ max unit v su pp ly voltage ac 2.0 5.0 6.0 v v cc supply voltage act 4.5 5.0 5.5 v v in , v out dc input voltage, output voltage (ref. to gnd) 0 v cc v i t ri d f ll ti (n t 5) v cc @ 3.0 v 150 t r , t f input rise and fall time (note 5) ac devices except schmitt inputs v cc @ 4.5 v 40 ns/v r , f ac devices exce t schmitt in uts v cc @ 5.5 v 25 t t input rise and fall time (note 6) v cc @ 4.5 v 10 ns/v t r , t f in ut rise and fall time (note 6) act devices except schmitt inputs v cc @ 5.5 v 8.0 ns/v t j junction temperature (pdip) 140 c t a operating ambient temperature range 40 25 85 c i oh output current e high 24 ma i ol output current e low 24 ma 5. v in from 30% to 70% v cc ; see individual data sheets for devices that differ from the typical input rise and fall times. 6. v in from 0.8 v to 2.0 v; see individual data sheets for devices that differ from the typical input rise and fall times.
mc74ac377, mc74act377 http://onsemi.com 4 74ac dc characteristics t a = +25 c t a = t a = +25 c t a = 40 c to +85 c symbol parameter v cc (v) typ guaranteed limits unit conditions v ih minimum high level input voltage 3.0 4.5 5.5 1.50 2.25 2.75 2.10 3.15 3.85 2.10 3.15 3.85 v v v v out = 0.1 v or v cc 0.1 v v il maximum low level input voltage 3.0 4.5 5.5 1.50 2.25 2.75 0.90 1.35 1.65 0.90 1.35 1.65 v v v v out = 0.1 v or v cc 0.1 v v oh minimum high level output voltage 3.0 4.5 5.5 2.99 4.49 5.49 2.9 4.4 5.4 2.9 4.4 5.4 v v v i out = 50 a 3.0 4.5 5.5 2.56 3.86 4.86 2.46 3.76 4.76 v v v *v in = v il or v ih 12 ma i oh 24 ma 24 ma v ol maximum low level output voltage 3.0 4.5 5.5 0.002 0.001 0.001 0.1 0.1 0.1 0.1 0.1 0.1 v v v i out = 50 a 3.0 4.5 5.5 0.36 0.36 0.36 0.44 0.44 0.44 v v v *v in = v il or v ih 12 ma i oh 24 ma 24 ma i in maximum input leakage current 5.5 0.1 1.0 a v i = v cc , gnd i old i ohd maximum input leakage current 5.5 5.5 75 75 ma ma v old = 1.65 v max v ohd = 3.85 v min i cc maximum quiescent supply current 5.5 8.0 80 a v in = v cc or gnd *all outputs loaded; thresholds on input associated with output under test. 2maximum test duration 2.0 ms, one output loaded at a time. note: i in and i cc @ 3.0 v are guaranteed to be less than or equal to the respective limit @ 5.5 v v cc . 74ac ac characteristics for figures and waveforms, see figures 4, 5, and 6. t a = +25 c t a = 40 c to +85 c t a = +25 c c l = 50 pf t a = 40 c to +85 c c l = 50 pf symbol parameter v cc * (v) min typ max min max unit f max maximum clock frequency 3.3 5.0 90 140 75 125 mhz t plh propagation delay cp to q n 3.3 5.0 3.0 2.0 13.0 9.0 1.5 1.5 14.0 10.0 ns t phl propagation delay cp to q n 3.3 5.0 3.5 2.5 13.0 10.0 2.0 1.5 14.5 11.0 ns * voltage range 3.3 v is 3.3 v 0.3 v; voltage range 5.0 v is 5.0 v 0.5 v. 74ac ac operating requirements t a = +25 c t a = 40 c to +85 c t a = +25 c c l = 50 pf t a = 40 c to +85 c symbol parameter v cc * (v) typ guaranteed minimum unit t s setup time, high or low d n to cp 3.3 5.0 5.5 4.0 6.0 4.5 ns t h hold time, high or low d n to cp 3.3 5.0 0 1.0 0 1.0 ns t s setup time, high or low ce to cp 3.3 5.0 6.0 4.0 7.5 4.5 ns t h hold time, high or low ce to cp 3.3 5.0 0 1.0 0 1.0 ns t w cp pulse width high or low 3.3 5.0 5.5 4.0 6.0 4.5 ns * voltage range 3.3 v is 3.3 v 0.3 v; voltage range 5.0 v is 5.0 v 0.5 v.
mc74ac377, mc74act377 http://onsemi.com 5 74act dc characteristics t a = t a = +25 c t a = 40 c to +85 c symbol parameter v cc (v) typ guaranteed limits unit conditions v ih minimum high level input voltage 4.5 5.5 1.5 1.5 2.0 2.0 2.0 2.0 v v out = 0.1 v or v cc 0.1 v v il maximum low level input voltage 4.5 5.5 1.5 1.5 0.8 0.8 0.8 0.8 v v out = 0.1 v or v cc 0.1 v v oh minimum high level output voltage 4.5 5.5 4.49 5.49 4.4 5.4 4.4 5.4 v i out = 50 a 4.5 5.5 3.86 4.86 3.76 4.76 v *v in = v il or v ih 24 ma i oh 24 ma v ol maximum low level output voltage 4.5 5.5 0.001 0.001 0.1 0.1 0.1 0.1 v i out = 50 a 4.5 5.5 0.36 0.36 0.44 0.44 v *v in = v il or v ih 24 ma i oh 24 ma i in maximum input leakage current 5.5 0.1 1.0 a v i = v cc , gnd i cct additional max. i cc /input 5.5 0.6 1.5 ma v i = v cc 2.1 v i old i ohd 2minimum dynamic output current 5.5 75 75 ma v old = 1.65 v max v ohd = 3.85 v min i cc maximum quiescent supply current 5.5 8.0 80 a v in = v cc or gnd *all outputs loaded; thresholds on input associated with output under test. 2maximum test duration 2.0 ms, one output loaded at a time. 74act ac characteristics for figures and waveforms e see figures 4, 5, and 6. t a = +25 c t a = 40 c to +85 c t a = +25 c c l = 50 pf t a = 40 c to +85 c c l = 50 pf symbol parameter v cc * (v) min typ max min max unit f max maximum clock frequency 5.0 140 125 mhz t plh propagation delay cp to q n 5.0 3.0 9.0 2.5 10 ns t phl propagation delay cp to q n 5.0 3.5 10 2.5 11 ns *voltage range 5.0 v is 5.0 v 0.5 v. 74act ac operating requirements t a = +25 c t a = 40 c to +85 c t a = +25 c c l = 50 pf t a = 40 c to +85 c c l = 50 pf symbol parameter v cc * (v) typ guaranteed minimum unit t s setup time, high or low d n to cp 5.0 4.5 5.5 ns t h hold time, high or low d n to cp 5.0 1.0 1.0 ns t s setup time, high or low ce to cp 5.0 4.5 5.5 ns t h hold time, high or low ce to cp 5.0 1.0 1.0 ns t w cp pulse width high or low 5.0 4.0 4.5 ns *voltage range 5.0 v is 5.0 v 0.5 v.
mc74ac377, mc74act377 http://onsemi.com 6 capacitance symbol parameter value typ unit test conditions c in input capacitance 4.5 pf v cc = 5.0 v c pd power dissipation capacitance 90 pf v cc = 5.0 v switching waveforms figure 4. clock q t r t f v cc gnd 50% 50% t plh t phl 50% data clock v cc figure 5. valid gnd *includes all probe and jig capacitance c l * 50 scope test point device under test output figure 6. t w 1/f max v cc gnd t su t h 50% figure 7. test circuit 450 50% ce clock v cc v cc gnd t su t h 50%
mc74ac377, mc74act377 http://onsemi.com 7 ordering information device package shipping mc74ac377n pdip20 18 units/rail mc74act377n pdip20 18 units/rail mc74ac377dw soic20 38 units/rail mc74ac377dwr2 soic20 1000 tape & reel mc74act377dw soic20 38 units/rail mc74act377dwr2 soic20 1000 tape & reel mc74ac377dt tssop20 75 units/rail mc74ac377dtr2 tssop20 2500 tape & reel mc74act377dt tssop20 75 units/rail mc74ac377m eiaj20 40 units/rail mc74act377m eiaj20 40 units/rail mc74act377mel eiaj20 2000 tape & reel
mc74ac377, mc74act377 http://onsemi.com 8 ac 377 alyw ac377 awlyyww mc74ac377n awlyyww 74ac377 awlyww marking diagrams pdip20 so20 tssop20 eiaj20 act 377 alyw act377 awlyyww mc74act377n awlyyww 74act377 awlyww a = assembly location wl, l = wafer lot yy, y = year ww, w = work week
mc74ac377, mc74act377 http://onsemi.com 9 package dimensions pdip20 n suffix 20 pin plastic dip package case 73803 issue e notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension l to center of lead when formed parallel. 4. dimension b does not include mold flash. m l j 20 pl m b m 0.25 (0.010) t dim min max min max millimeters inches a 25.66 27.17 1.010 1.070 b 6.10 6.60 0.240 0.260 c 3.81 4.57 0.150 0.180 d 0.39 0.55 0.015 0.022 g 2.54 bsc 0.100 bsc j 0.21 0.38 0.008 0.015 k 2.80 3.55 0.110 0.140 l 7.62 bsc 0.300 bsc m 0 15 0 15 n 0.51 1.01 0.020 0.040 e 1.27 1.77 0.050 0.070 1 11 10 20 a seating plane k n f g d 20 pl t m a m 0.25 (0.010) t e b c f 1.27 bsc 0.050 bsc so20 dw suffix 20 pin plastic soic package case 751d05 issue f 20 1 11 10 b 20x h 10x c l 18x a1 a seating plane h x 45 e d m 0.25 m b m 0.25 s a s b t e t b a dim min max millimeters a 2.35 2.65 a1 0.10 0.25 b 0.35 0.49 c 0.23 0.32 d 12.65 12.95 e 7.40 7.60 e 1.27 bsc h 10.05 10.55 h 0.25 0.75 l 0.50 0.90 0 7 notes: 1. dimensions are in millimeters. 2. interpret dimensions and tolerances per asme y14.5m, 1994. 3. dimensions d and e do not include mold protrusion. 4. maximum mold protrusion 0.15 per side. 5. dimension b does not include dambar protrusion. allowable protrusion shall be 0.13 total in excess of b dimension at maximum material condition.
mc74ac377, mc74act377 http://onsemi.com 10 package dimensions tssop20 dt suffix 20 pin plastic tssop package case 948e02 issue a dim a min max min max inches 6.60 0.260 millimeters b 4.30 4.50 0.169 0.177 c 1.20 0.047 d 0.05 0.15 0.002 0.006 f 0.50 0.75 0.020 0.030 g 0.65 bsc 0.026 bsc h 0.27 0.37 0.011 0.015 j 0.09 0.20 0.004 0.008 j1 0.09 0.16 0.004 0.006 k 0.19 0.30 0.007 0.012 k1 0.19 0.25 0.007 0.010 l 6.40 bsc 0.252 bsc m 0 8 0 8 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash, protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. 5. dimension k does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the k dimension at maximum material condition. 6. terminal numbers are shown for reference only. 7. dimension a and b are to be determined at datum plane -w-. 110 11 20 pin 1 ident a b t 0.100 (0.004) c d g h section nn k k1 jj1 n n m f w seating plane v u s u m 0.10 (0.004) v s t 20x ref k l l/2 2x s u 0.15 (0.006) t detail e 0.25 (0.010) detail e 6.40 0.252 --- --- s u 0.15 (0.006) t eiaj20 m suffix 20 pin plastic eiaj package case 96701 issue o dim min max min max inches --- 2.05 --- 0.081 millimeters 0.05 0.20 0.002 0.008 0.35 0.50 0.014 0.020 0.18 0.27 0.007 0.011 12.35 12.80 0.486 0.504 5.10 5.45 0.201 0.215 1.27 bsc 0.050 bsc 7.40 8.20 0.291 0.323 0.50 0.85 0.020 0.033 1.10 1.50 0.043 0.059 0 0.70 0.90 0.028 0.035 --- 0.81 --- 0.032 a 1 h e q 1 l e 10 0 10 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions d and e do not include mold flash or protrusions and are measured at the parting line. mold flash or protrusions shall not exceed 0.15 (0.006) per side. 4. terminal numbers are shown for reference only. 5. the lead width dimension (b) does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the lead width dimension at maximum material condition. dambar cannot be located on the lower radius or the foot. minimum space between protrusions and adjacent lead to be 0.46 ( 0.018). h e a 1 l e q 1 c a z d e 20 110 11 b m 0.13 (0.005) e 0.10 (0.004) view p detail p m l a b c d e e l m z
mc74ac377, mc74act377 http://onsemi.com 11 notes
mc74ac377, mc74act377 http://onsemi.com 12 on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indem nify and hold scillc and its of ficers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and re asonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized u se, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employ er. publication ordering information japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402700 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. mc74ac377/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com n. american technical support : 8002829855 toll free usa/canada

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